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*Introduction*

3. The Output Characteristics of MOSFET

*n-MOSFET:*

(1) Triode

For Vgs > Vt and Vds < Vds(sat) = Vgs - Vt (or equivalently, Vgd > Vt), the channel is continuous all the way from S to D. Thus the n-channel acts like a conductor (or resistor) whose conductance is proportional to the amount of electrons induced at the Source-end (and thus injected from Source into channel). The channel current (or drain current) is given by

Id = k [ (Vgs - Vt)Vds - 1/2 Vds*Vds ]

(2) Saturation

At Vds = Vds(sat), where Vds(sat) is defined as Vgs - Vt, the Drain-end of channel is just pinched off. Beyond this voltage, that is, Vds > Vds(sat), the channel is no longer acts as a resistor. This is in the sense that the current Id does not depend on the bias voltage Vds. The current is pretty much determined by how many carriers flow into the channel at the Source-end of channel. The saturated drain current, Ids, is given by

Ids = 0.5 k (Vgs - Vt)^{2}.

Increasing Vds while keeping Vgs constant does not increase the drain current. At the end of channel (channel pinch-off) all carriers are swept into Drain by the electric field.

Actually, the Drain current Ids increases slightly as Vds increases. This is because the increasing Vds decreases the channel length (try to change Vds in the applet and watch the changing channel length). This is called channel length modulation. Mathematically, the channel length modulation introduces a Vds-dependent term in Ids:

Ids = 1/2 k (Vgs - Vt) ( 1 + LAMBDA * Vds )

where LAMBDA is the channel length modulation parameter, a small number.
Note that V_{A} = 1/ LAMBDA is similar to the Early voltage
of BJT.

(3) Circuit model parameters for MOSFET

**Input resistance:** The electrically insulating Gate oxide layer
prevents any flow of current from Gate to Source. In a common-Source configuration
with Gate as the input and Drain as the Output, the input resistance is
infinity. This is because the input current (the Gate current Ig) is zero
regardless of the value of the input voltage (the Gate-Source voltage Vgs).

**Output resistance**: The small-signal circuit model parameter for
output resistance in the common-Source configuration is calculated as follows.
The Drain-Source voltage Vds is such that the MOSFET is in saturation.
The *ac output voltage* is a small variation of Vds around the dc-bias
point. As the Vds varies, the drain current Id (or Ids, the saturated value
-- "s" stands for "saturation") varies a little due
to the channel length modeulation. The variation
in Ids is the *ac output current*, and its ratio to the *ac output
voltage* is equal to the **output resistance**. The channel length
modulation effect is expressed as

Ids = 0.5k (Vgs - Vt)^{2} [1 + L Vds]

and the **output resistance** is

r_{o} = del(Vds)/del(Ids) = 1/[Ids_{0} L].

Where

Ids_{0} = 0.5k (Vgs - Vt)^{2}.

**Carrier electrons
at the pinched-off drain-end of the n-channel**:
Increasing Vds beyond Vds(sat), or equivalently decreasing Vgd below Vt,
creates a fully depleted region between the end of inversion
channel and the drain region. An electric field is set up in this
region, pointing from the Drain region toward the inversion channel. This
is because Vds > 0 for n-channel device. *Carrier electrons
in the n-channel reaching the depletion boundary will be swept across the
depletion region into the Drain.* This is similar to the depletion region
in a reverse biased pn junction diode where the minority carrier electrons
of the p-side are swept to the n-side by the built-in field whenever they
reach the depletion boundary. Look at this pn-junction
applet.

**Channel length modulation:** The Drain-end
of channel is pinched off at Vgd = Vt, or equivalently at Vds = Vds(sat)
= Vgs - Vt. For an n-channel MOSFET, increasing Vds further so that Vds
> Vds(sat) (or decreasing Vgd so that Vgd < Vt), the length of inversion
channel (i.e., the **blue **inversion channel
in the applet) is 'effectively' decreased. Since the channel resistance
is proportional to the channel length, the channel resistance is decreased.
This results in the slight increase of the drain current beyond the saturation
level.

Ids = (1/2) K'_{n}(W/L) (Vgs - Vt)^{2} (1 + **LAMBDA
*** Vds).

in which **LAMBDA **is called the channel-length modulation parameter
and k = K'_{n} * (W/L). Here, W is the width and L is the length
of the channel. The typical values are

0.001 V^{-1} < **LAMBDA **< 0.1 V^{-1}.

In the saturation region, try to vary the bias voltage, Vgd or Vds, and watch the variation in the channel length and the (slight) increase/decrease of the drain current. In the applets, the changes in the channel length with Vds (or Vgd) is not drawn to scale.