Demonstration of CMOS Inverter DC Characteristics

A complementary CMOS inverter is realized by the series connection of a p- and n-device, as shown in Fig.1. Pmos transistor is on if gate voltage, Vgsp, is less than threshold voltage, VTP. Nmos transistor is on if gate voltage, Vgsn, is greater than threshold voltage, VTN. In order to derive the DC-transfer characteristics for the inverter ( output voltage, Vout, as a function of the inverter, Vin), we start with the following table.


Relations between Voltages for different Operations

channel off channel on
Pmos Vgsp > VTp

Vin > VTp + VCC

Vgsp < VTP

Vin < VTp + VCC

Nmos Vgsn < VTn

Vin < VTn

Vgsn > VTn

Vin > VTn


For normal operation, a logic "0" in the input will turn on Pmos and turn off Nmos because of (VTN > Vin < VTP + VCC). As a resuilt, Pmos pull-up the voltage in the Vout. A logic "1" in the input will turn off Pmos and turn on Nmos because of (VTN < Vin > VTP + VCC ). Therefore, Nmos pull-down the voltage in the Vout.

However, this normal situation will not be ture if threshold voltage exceeds normal value. To experience the abnormal situation, users can use the following Java applet to change the threshold voltage of both transistors and type in a Vcc value, which change the minium value of logic "1", VIH, and the maxinum value of logic "0", VIL. The voltage charateristic of VIH and VIL are based on the noise margins for the 74HC series.

Instructions of Java Applet

Color representation


JAVA APPLET