Answer to No.7

c) PMOS when the input is high

For input high, the output should be low.  Vout shold be shorted to GND (low) and the path to Vcc should get disconnected. The MOSFET switch should be closed to GND, open to Vcc.  That is, for Vin = high, NMOS must be ON, PMOS must be OFF.

PMOS is ON if Vgs < VTp.

Vgs = Vin - Vcc < VTp.  (PMOS ON)
Vin < VTp + Vcc.


For Vin where VTp + Vcc > Vin > VIH, PMOS is ON.
For input high, both NMOS and PMOS are ON ... Vcc is shorted to GND.

Indeed, the VIH (minimum voltage for Noise Margin NM_H) is limited by VTp because of this problem.