Answer to No.6

b) NMOS when the input is low

The maximum input voltage for logic-0 (VIL) may not exceed VTn.  If VIL > VTn, then for Vin where VTn < Vin < VIL, the NMOS is ON, making the Vout shorted to GND.  Since PMOS is also ON for logic-0 input, this causes the Vcc to be shorted to GND !