Preparation, Orientation: [You may skip this part if you are already familiar with the buttons and components in this applet.]

1. Maximize your Browser window (a 17" monitor should show the entire applet screen.)
2. The top-bar in the applet has the "Schottky-clamped" checkbox, "Ckt Param" button, "BJT Param" button, and the choice for images at the lower-right part of applet screen.
3. The bottom-bar of the applet has four buttons to control animation. Click on the "Pause" button (the third button in the bottom-bar) to suspend the animation thread. This will suspend the 'eye-disturbing' effect of animation while you are settling in.
4. Also note that the horizontal spacing of grids in the waveform graphs is roughly 5 ns. The horizontal axes represent the elapsed time and the waveforms travel from left to right. The horizontal axes are the same in all four waveform graphs.
5. Note that the "elapsed time=", shown in the circuit diagram in the upper-left corner of applet screen, represents the elapsed time since the last 'switching' action in the input signal voltage, Vi.
6. The main screen view is composed of five sections:
• i) top left part is the basic RTL circuit with user's switching ability using a mouse click in the input voltage Vi area;
• ii) below the RTL circuit there are four graphs, Vi (input voltage), iB (Base current), Qb (total excess minority carrier charge in Base), and iC (Collector current);
• iii) top-center part shows a BJT device schematic;
• iv) top-right part of screen is the excess minority charge profile in Base; and
• v) Choice box on top-bar has three (3) items: "Planar BJT", "EB Junction" and "Delay Times". The corresponding image appears at the lower-right part of applet screen.
7. The four waveform graphs are drawn versus the elapsed time:
1. Vi = input voltage waveform,
2. iB = Base current waveform,
3. Qb = total excess minority carrier charge in the Base. Here Qeos (the red horizontal line) is the excess Base charge at the edge-of-saturation (i.e., the boundary between forward-active region and saturation region of BJT, and
4. iC = Collector current waveform.

• Delay Times for Conventional BJT (without Schottky-diode clamp between C and B).
• In the Choice box on top-bar (fourth item) select "Delay Times". This will display five different delay times in the lower-right part of the screen. Write down the values on a scratch paper to refer to it when palying the applet. These are explained individually below.
• Turn-on delay consists of t_d1, t_d2and t_r.  Turn-off delay consists oft_s and t_f.
• Turn-On Delay: td1 + td2 + tr
• t_d1 = Emitter junction charging time :
1. Select "EB Junction" in the Choice box on top-bar. You should see a magnified view of the Emitter-Base junction in the lower-right part of the screen.
2. Click on the Vi (input voltage) area to set Vi at the lower voltage (0.2 V). Let the applet animate and wait until the BJT is in "Cutoff" state (look at the top-right part of applet screen: in cutoff state, the excess minority carrier in Base is zero -- empty in the Base charge profile).
3. While watching the enlarged EB Junction image at bottom-right part of applet screen, click on the Vi to switch it to input High (3.7 V) if you are in animation mode. Or, click on the "StepForward" button to move forward if you are in the "Pause" mode.
4. Watch that the thickness of depletion region (white region) in the EB Junction is decreasing (from about xn + xp = 100nm corresponding to Vbe = 0.2V to about xn + xp = 59 nm corresponding to Vbe = 0.7V.) This is the charging process of EB junction, from the depletion width of the initial cutoff region (or 'nearly' reverse biased PN junction) to that of forward-active region.
5. The time elapsed in this process is t_d1 (1.54 ns with default parameter values.)
6. One can verify this by using the "StepForward" button at the bottom-bar. The enlarged EB Junction image is on screen. To do this, first drive BJT into the Cutoff state. Second, click on the "Pause" button. Third, click on Vi area to set Vi = High (3.7 V). Last, keep clicking the "StepForward" button until the depletion edge first reaches the minimum value (xp = 58 nm). The "elapsed time" in the RTL circuit area should show 1.54 ns.
• t_d2 = Time for first minority carrier to reach the Collector junction. For modern day BJTs, this delay time is negligibly small. You may skip this one and move on to the rise time tr, or you can follow the steps below to see how small it is for a fT = 1GHz device.
1. Continuing on from the last step above, the EB junction is charged to the forward-bias value (say 0.7V). The applet is still in the "Pause" mode, with the last two buttons in the bottom-bar displaying "Resume" and "StepForward". [At this point, you may wish to click twice on the Vi area of the circuit diagram to reset the "elapsed time" to zero. ( the EB junction capacitance has been charged to 0.7V and Vi = High.)]
2. By first or second click of the "StepForward" button the "Cutoff" state will be changed to "Forward Active". At this point, the first minority carriers have already arrived at the Collector junction. The "elapsed time" in the RTL circuit area 'may' indicate 5.31E-11 s = 0.053 ns ! Check if this value agrees with the t_d2 value in the "Delay Times" image. As I told you, this delay time can be safely ignored.
3. Approximately, this value equals 1 / (6*PI * f_T). The higher the cutoff frequency f_T of BJT the shorter it will take for the first minority carriers to arrive at the Collector junction. The default value is set to f_T = 1 GHz in this applet. [Try changing the fT value and see its effect on td2 if you like.] Modern day transistors with much higher cutoff (unity current gaiun) frequency f_T, the t_d2 may be ignored.
• t_r = Collector current i_C rise time.
1. Set the applet in "Pause" mode. The Base (or BJT) has just entered the "Forward Active" state, which is the last step above.
2. Click twice on the Vi area to reset the "elapsed time" to zero second.
3. Click as many times as necessary on the "StepForward" button until the BJT enters "Saturation" for the first time. Read the "elapsed time" value. This value should be a bit larger than the rise time t_r which you read from the "Delay Times" image because t_r is calulated for i_Cto rise from 10% of Isat to 90% of Isat, instead of 0 to Isat.
4. Note that the minority carrier concentration profile in the Base has now reached the maximum possible slope. This also measns that the Collector current has reached its maximum value as i_C is proportional to this slope (diffusion current).
5. The rise time t_r has something to do with how fast the base charge increases from zero toward the edge-of-saturation value, Qeos. Therefore, t_r is a function of the BJT internal capacitances, C_je and C_jc.
6. Further driving the transistor into saturation does not increase slope of the concentration profile. See it yourself by keep clicking on the "StepForward" button, or by clicking the "Resume" button to animate. The Base charge continues to increase, but the i_C has reached its maximum, Isat, as the Q_b and i_C waveform graphs show.
• Turn-Off Dealy: t_s + t_f
• t_s = stored delay time or saturation delay time.
1. When V_i is switched to low (0.2V), i_Cdoes not respond but remains constant for a time t_s. This is the time required to remove the saturation charge from the Base and Q_b reaches Q_eos from the maximum t_s * I_B2 where I_B2 = (V₂ - V_be)/R_B = (3.7V - 0.7V)/10k.
2. During this time t_s, the EB junction remains at Forward bias Vbe = 0.7V and Vi = 0.2 V. A reverse base current I_B1 = (V₁ - V_be)/R_B = (0.2V - 0.7V)/10k flows which helps to 'discharge' the Base.  If this reverse I_B1 is not present, the saturation charge will be removed entirely by the recombination process alone, which will take a much longer time to remove Q_b.
3. The stored delay time, t_s, is given by

       t_s = t_s* ln[ (I_B2 - I_B1)/(I_Bsat - I_B1) ]
where I_Bsat = I_sat/Beta.
4. In order to 'feel' the t_s, follow the following steps.
1. Set Vi = High = (3.7 V), and animate the applet until Qb no longer increases.
2. Click on "Pause" button to suspend the animation. Click on Vi area to set Vi = Low = (0.2V) and reset the "elapsed time" to 0 s.
3. Click "Resume" button to animate. As the "Saturation" state first turns to "Forward Active" state, click on the "Pause" button to suspend the animation.
4. At this point, Qb should have just reached the edge-of-saturation value, Qeos; iC still remains at its maximum value, while the Base charge profile shows the same slope.
5. The elapsed time should read a little over 2.0E-8 s = 20 ns. This is the stored delay time that effects a very slow turnoff time for saturated BJT logic.
• t_f = fall time.
1. As Qb falls from Qeos toward zero, iC falls exponentionally with a time constant that depends on the junction capacitances, C_je and C_jc. [From the network theorem known as Miller's theorem, the Collector junction capacitance C_jc is augmented by the voltage gain A_v. But in this applet the Miller effect was not considered and thus the fall time may be somewhat smaller that actual value.]
2. The slope of minority charge profile in Base decreases toward zero, and thus iC decreases from its maximum value, Isat, toward zero.
3. Finally, the EB junction capacitance charges up to the reverse bias value (or the turnoff value, which is V₁ = 0.2V in this applet). You may see this in the EB Junction image. However, this EB Junction charging does not contribute to the turnoff delay time because the i_C already has reached zero before the EBJ started to charge.
• Summary:
• Turn-On delay time: t_d1 + t_d2 + t_r = 1.54 + 0.05 + 5.70 = 7.3 ns.
• Turn-Off delay time: t_s + t_f = 20.5 + 3.21 = 23.7 ns.
• These numbers should be taken as a rough estimate only.
• Compare these numbers to the gate delay times of less than 1.5 ns of modern day TTL and the gate delay time of less than 1 ns for ECL even in the SSI or MSI.
• Delay Times for Schottky-clamped BJT.
• In order to eliminate the saturation charge in Base, which is responsible for the long turnoff time (t_s is due to the saturation charge in the t_turnoff = t_s + t_f), a Schottky diode is put in parallel to the CB junction.
1. Check the "Schottky-clamp" checkbox.
2. Notice the changes in the RTL circuit, in the BJT device (top-middle image in screen) and in the planar structure of BJT (select the "Planar BJT" in the choice box on top-bar.).
3. In the Planar BJT cross-section, the Aluminium contact metal to the Base is extended all the way to the Si surface of the Collector region. The Al in contact with p-type Base is an Ohmic contact, whereas the Al in contact with n^--type Collector is a rectifying Schottky contact. This diode has the current flow direction from Base into Collector. Thus the Base-Collector PN diode now has a Al-Si Schottky diode connected in parallel, as can be seen in the RTL circuit diagram.
4. The consequence is: when the CB junction is forward biased (in the saturation mode), the Schottky diode is also forward biased and conducts current in parallel with the CB pn junction. At this point, the user may want to check out the forward voltage drop across a Si Schottky diode and the forward voltage drop in a Si pn diode when the current is the same (or comparable) using this applet. [In IV applet, select Si PN diode, set V = 0.7V, and read the current I. Then select Schottky, the applet will show you a new voltage drop at the same current level. The Schottky diode shows much smaller V drop than a PN diode at the same current flow level.]
5. Because the current almost entirely pass through this Schottky diode and nearly nothing through the CB pn junction, and because the voltage drop is now 0.5 V (with a forward-biased Schottky diode) rather than 0.7 V (forward-biased silicon pn diode alone), the excess charge at the CB junction is exp[(0.7-0.5)/kT) = exp(0.2/0.0259) = 2,257 times smaller with the Schottky diode clamp than without the Schottky diode clamp.
6. The net result is that the CB junction has a negligibly small excess charge at the highest possible Base current, thus keeping the BJT in "Forward Active" mode at all times, and eliminating the "Saturation" mode altogether.
7. Verify the above points using the applet by
1. first, check the "Schottky-clamped" checkbox.
2. drive the BJT into cutoff by animating with Vi = LOW.
3. then click on Vi area to switch to Vi = HIGH.
4. Note that the Base charge NEVER increases into the "Saturation" region. The maximum Base charge is now 'clamped' at the edge-of-saturation value Q_eos.
• Dealy Times:
• Turn-On time:
• not affected. same as the conventional BJT. Quiz (why ?)
• Verify this using the applet yourself.
• Turn-Off time:
1. Drive the BJT to 'ON' state by setting Vi=HIGH and animating the applet for long enough.
2. Now switch Vi to Vi=LOW by mouse click.
3. Observe that the Qb returns to zero and the iC returns to zero in just t_f time from the third and fourth graphs.
4. The turnoff time is now equal to t_f. instead of t_s + t_f in the saturated logic.
5. The Schottky-diode clamp eliminates the storage delay time altogether.
6. t_turnoff = t_f = 3.2 ns. Compare this to t_turnoff = t_s + t_f = 23.7 ns for the conventional BJT.
• Summary:
• the Schottky diode clamp reduces the turnoff time very much.
• you could 'feel' the slow removal of saturated charge from the Base using this applet.
• this decreases the gate delay time substantially.
• all high speed BJT digital circuits need to avoid the saturation of BJT.