Virtuoso Layout Editor User Guide -- Glossary

Virtuoso Layout Editor User Guide, Product Version 5.0

Glossary

A

abutment
Abutment is the ability to overlap, partially or completely, instances of cells to make an electrical connection without introducing design rule check or connectivity errors. The two instances must include pins connected to the same net.

AEL expressions
Analog Expression Language (AEL) expressions used to define design parameters as functions of variables. These expressions are used by the mixed signal and analog netlisters.

aspect ratio
The width-to-height ratio of a layout. Setting a 1:1 ratio results in a square shape.

autoLayout
A cellview that shows the physical design hierarchy at a given hierarchical level. Block Ensemble^TM and other place-and-route tools use this cellview. The software automatically creates autoLayout cellviews when you flatten the logical hierarchy.

Top-level designs and soft blocks have autoLayout cellviews. A flat autoLayout has only one hierarchical level and one autoLayout cellview. A hierarchical autoLayout has one top-level autoLayout and one autoLayout for each soft block in the hierarchy.

The autoLayout cellview references the abstract or autoAbstract cellviews for the instances it contains but does not show all physical details of the instances.

B

banner
In the Cadence® software, a bar across a window that contains the names of menus.

bbox. See bounding box
bindkey
In the Cadence® software, a key combination or mouse button that executes one or more Cadence® SKILL commands.

block
A collection of instances that forms a hierarchy.

boundary. See design boundary
bounding box (bbox)
A rectangle that encompasses all of the shapes in an instance (or a selected set).

bus
A named collection of nets. Bundling nets together in a bus makes it easier to route nets with similar routing patterns. You cannot use buses in Gate Ensemble® and Cell3 Ensemble® designs.

C

Cadence design environment
The Cadence® software: programs running within the operating system and X Window System environment.

Cadence software
The programs that contain graphic design capabilities and a graphic user interface from Cadence Design Systems.

Cadence system
A computer system with the Cadence® software installed.

CDF. See Component Description Format
.cdsinit
The file that defines the startup environment of the Cadence® software.

cell
A component of a design; a collection of different aspects (representations) of component implementations, such as its schematic, layout, or symbol representations. A design object consisting of a set of views that can be stored and referenced independently. A cell can include other cells, forming a hierarchical design. A cell is an individual building block of a chip or system. In the database, a cell contains all the cellviews of that cell.
An inverter and a buffer are examples of a small cell. A decoder register, arithmetic logic unit (ALU), memories, complete chips, and printed circuit boards are examples of large cells.

cellview
A specific representation (view) of a cell. A particular representation of a particular component, such as the physical layout of a flip-flop or the schematic symbol of a NAND gate. A database object containing all the information unique to a particular representation of a particular component. Cellviews are classified by their viewType. Each cellview has a view name and can have one or more versions. See also view.

cell boundary
The outside boundary of a layout cellview; a rectangle on any user-defined layer of function property cellBoundary or the reserved layer boundary.

For user-defined layers, there is an implicit zero-valued enclosure rule from the boundary to any object contained inside. For the cell boundary layer, all objects are kept inside the boundary.

chaining
Chaining, of transistors, is the ability to automatically abut a list of MOS transistors (or the fingers of folded transistors) with one another in a specified order. Transistors to be chained must be set up for abutment.

CIW. See Command Interpreter Window
click
Rapidly press and release a mouse button.

Command Interpreter Window (CIW)
The window that launches any Cadence® design framework II application. The CIW logs your design session and reports messages.

compactor. See Virtuoso® compactor
compacted view
A compacted layout that contains transistors, contacts, routing, and net connectivity.

component
For the purposes of Virtuoso XL, a component is a pin or a device.

Component Description Format (CDF)
A Cadence® design framework II feature that lets you assign attributes, properties, and parameters to libraries and cells for such purposes as assigning parameter names and values, allocating units and default values, checking that values lie within specified ranges, dynamically changing how parameters are displayed depending on predefined conditions, and executing Cadence® SKILL programming language functions whenever certain information is changed (callback functions). A cell CDF lets you store information specific to a cell with that cell. For more information, see the Component Description Format User Guide.

constraint
A restriction on the placement or size of an object, or a timing requirement for a net or delay path.

contact
A connection point between wires of different types (generally metals and non-metals) that connects the lowest metal layer and the conducting layer below it. The structure contains the two conducting layers and contact cut.

current window
The Cadence® window in which you do something, such as click on a title bar or border, pull down a menu, or work on a design. The window remains the current window until you do something in another design window.

current directory
The directory in which you started the Cadence® software.

cyclic field
A button on a form that displays a list of valid options when you click a mouse button on it. For example, a cyclic field button called Units lets you select the units of measurement and gives you a choice of inches, centimeters, mils, or microns.

D

default value
The value used by the software unless you specify otherwise. The default is frequently the initial state.

delay
The time interval between the manifestation of a signal at one point and the manifestation or detection of the same signal at another point.

delay path
An ordered series of instance-pin pairs that forms a connected signal path.

design
A window holding a cellview. A composite of cells and views, usually hierarchical.

design boundary
The outside boundary of a layout cellview; a rectangle on the reserved layer boundary (prboundary). For user-defined layers, there is an implicit zero-valued enclosure rule from the boundary to any object contained inside. For the boundary layer, all objects are kept at half the maximum design rule inside the boundary. See also cell boundary.

Design framework II
The Cadence® framework system that provides a common interface for schematic capture, layout, floorplanning, place and route, and verification tools.

design library
A library that contains data for the current design. It is usually in the designer's own directory or in the design group's directory.

device
A design element that has both a symbol view and a layout view, with corresponding pins.

double-click
Press the mouse button twice, rapidly.

drag
Press and hold the mouse button while moving the mouse.

drain
The receiving end of the connection channel of a MOS transistor.

E

environment
The hardware and software setup and conditions within which the system operates.

externally connected pins. See must-connect pins

F

feedthrough pin
A pin that forms connections by passing through a cell or instance.

filled button
A darkened button on a form indicating an option is selected.

fingering
Fingering, of transistors, is the ability to divide a transistor pcell by setting the "number of Fingers" in the Property List Editor. All multiple fingers are part of the same pcell. The purpose is to split a transistor, but keep all fingers adjacent to one another under all conditions.

first point
The starting position of a graphic.

fixed menu
A menu with columns of buttons that appears in some application windows. Icons on the buttons represent selected pull-down menu commands.

floorplanning
Creating a rough plan to estimate whether a design meets timing and routability criteria.

folding
Folding, of transistors, is the ability to divide a MOS transistor pcell by the width into two or more instances (as specified) that can be kept adjacent or separated to achieve an interleaved configuration. You can fold two series transistors and interdigitate the folded legs using abutment. Transistor folding can be specified during device generation, when picking devices from the schematic, and interactively by selection.

font
A complete set of characters in one size, typeface, and style, such as 12-point Times Roman.

form
A window or dialog box that lets you specify information and options for a specific command or menu item in the Cadence® software. The options take effect when you click OK or Apply.

form field
A rectangle in a form into which you type information, or a cyclic field in a form that gives you a fixed group of options you can choose.

G

gate
A transistor that is formed when poly dissects diffusion. A gate is a device element for combinational logic, for example, AND gates and OR gates.

gate array
Gates placed in a prefabricated matrix where you provide the design for the interconnect. Gate array designs are cheaper to manufacture because only the interconnects have to be custom made.

global router
A router that divides the total routing area into parts and assigns the nets to be connected locally in each of the parts.

H

hierarchy
Nested design levels, such as instances within a cell. By default, you open the top level in the hierarchy when you open a cellview.

home directory
The directory in which you are placed when you log into a computer and to which you have read and write permission.

I

icon
A small graphic symbol that represents a cell, window, or application.

iconify
Change a window to an icon.

instance
A database object that represents a master cellview. You can have several instances of the same cellview in a design.

internal pin
A pin inside a cell that can be connected to the cell boundary through a specific access direction. Internal pins help connect blocks by allowing over-the-cell routers access to all pins in the layout.

internally connected pins. See strongly connected pins
interrow routing areas
The routing area between rows in the layout.

intrarow routing areas
Routing areas within each row and between the N- and P-diffusion strips.

iterated instances
A compact way of displaying repeated instances of a symbol in a schematic, particularly useful in bus-type or data-flow architectures that have identical structures to handle each bit on the bus. To add several instances of the same type, you can express multiple unique names with an iterative expression. For example, A<0:3> generates one graphic representing four instances: A0, A1, A2, and A3.

L

layer
In the Cadence® software, a physical or other design entity used as a visual representation of different types of information, such as mask geometries and interconnection in schematics. Each layer has its own colors, highlighting, menus, and design objects.

Layer Selection Window (LSW)
A window that lets you choose the design layer for objects in the layout, make design objects visible or invisible, or make design objects selectable or unselectable.

layout cellview
A layout view of a cell. Layout views include placed, uncompacted, and compacted views.

le_ex_# net
The notation used by Virtuoso XL to indicate a shape that is not part of a defined net in the design-usually an open or floating shape.

library
A logical collection of cells, views, and technology information. A physical collection of files and directories that can reside anywhere in the file system. A library can be shared by all users and controlled by a single person.

Each library has associated files, such as the technology file, catalog file, foreign database files, and an audit trail. The catalog file keeps track of the logical names of design objects and their physical location. The technology file governs mask layer names and colors, design rules, symbolic device definitions, and parameter values.

Library Manager
The Cadence® tool that displays the list of available libraries in your search path as well as any open libraries. You can use the Library Manager to search through your libraries, cells, views, cellviews, and versions.

list box
Fields in forms that you can scroll up or down to view and select items from a list.

LSW. See Layer Selection Window

M

master cell
Any layout cell you have placed in another cell. The placed copy of the cell is called a "cell instance."

master symbol
A representation of a design, such as an arithmetic logic unit (ALU) or register. In a schematic, an instance is linked to the master symbol; it is not a copy of the master symbol.

You can create a master symbol for a design and then place virtual copies (instances) of it throughout other designs.

maximize
Enlarging a window to fill the entire screen.

menu banner
The rectangular area across the top of a window. It contains menus, such as File, which display lists of commands when you click on them.

minimize
Changing a window to an icon.

must-connect pins
Pins that must be connected outside a cell and do not require routing between them inside the cell. Sometimes called "externally connected pins."

.mwmrc
The Motif window manager file that defines the Motif environment. Your system might have a default .mwmrc file or you might have your own in your home directory.

N

net
A logical signal connection between a set of pins on different instances. After routing, a net consists of routed wires on the routing layers.

NLP (Netlist Processor) Expressions
Expressions used to define design parameters as functions of variables. These expressions are used by the Open Simulation System (OSS) in netlisting.

O

object
A library, cell, view, cellview, version, cell category, or basic design object -such as a wire, via, or model-or a display object-such as an array or label. Each type of object, such as each type of path, is drawn on a different layer. Objects can have different functions or features, depending on the layer purpose.

options form
A window or dialog box that lets you specify information and various options while you are using a command. The options take effect immediately.

P

pan
To view a design by moving it in the window.

parameterized cell
A master cell that has parameters such as length and width. When creating an instance, you can change these parameters without changing the master cell. Parameterized cells are often called "pcells."

path
The course over which electrical current flows in a circuit. Also, the route through directories the system must take in the directory hierarchy to access a file.

pcell. See parameterized cell
pin
A physical implementation of a terminal. You can place pins on any layer. Pins can be feedthrough or internal. See also terminal.

pop-up
A menu that appears when you press the middle mouse button.

postselecting
Selecting a command first and then selecting the objects on which the command operates.

preselecting
Selecting objects for a command to operate on first and then selecting the command.

property
A characteristic of a design object or cellview that affects the appearance of the object. A property can be edited and deleted. Certain properties are mandatory for certain applications. Properties are defined and managed by the application.

R

radio button
A button on a form that lets you select only one of several choices. See also toggle button.

reference point
The point used to measure the exact distance between objects or line segments as you draw. The distance between reference points is shown in the Dist field at the top of the cellview.

reference library
A library that contains design data for cells placed in the current design, usually a well-verified collection of design objects shared and existing in a public system library.

relative path
The path to a file or directory from the current location within the file system.

restore
Change an icon back to a window.

routing
Physically connecting objects in a design according to design rules set in the reference library or technology file.

row
A rectangular area in a layout that contains a power and ground net, an N- and P-diffusion strip, and intra-row routing. Areas between rows in a layout are called inter-row routing areas.

S

schematic cellview
A cellview that describes the connectivity, gate widths, and gate lengths of transistors.

SDF (Standard Delay Format)
An ASCII format for writing out delay information and for passing the data between different Cadence® tools.

search path
The list of directories the software searches for files, libraries, and commands.

select
Choose an object by clicking on it or by enclosing it in a bounding box.

SKILL
The Cadence® SKILL language is a high-level programming language. Menu commands execute SKILL commands. SKILL is based on the LIS Processing (LISP) programming language but uses a C-like syntax. It is accessible only from within Cadence software.

source
The sending end of the connection channel of a MOS transistor.

stack
A group of abutted transistors.

strongly connected pins
Pins that are connected inside a cell and do not require external connection. Sometimes called "internally connected pins."

substrate contact
A contact that connects the substrate to power.

symbolic contact
A contact defined with the tfcDefineSymContactDevice() statement in the technology file. You can set the size and property values for these contacts. Symbolic contacts have symbolic views that contain contact information. Symbolic contacts are used as input and output terminals on lower-level blocks.

T

technology file
An ASCII file that uses Cadence® SKILL functions to define all the physical information required for a design. Technology files define information such as layers and layer properties, colors, display and plotter devices, views and view properties, physical design rules for compaction, and devices.

template
Information entered through the Layout Generation Options form and saved in an ASCII file that tells Virtuoso XL how to format a new layout.

terminal
The electrical input or output of a net. See also pin.

text entry window
A window in which you can enter commands or other information. A form is one type of text entry window.

text viewing window
A window in which you can view the contents of a file without leaving another application.

toggle
The action of switching between two states, such as on and off.

toggle button
A button on a form that lets you turn any number of choices on or off. See also radio button.

toolkit
A group of programming utilities.

top-down design
An approach to hierarchical design that uses estimates and floorplanning to start at the top level of a design.

transistor chaining. See chaining, of transistors
transistor fingering. See fingering, of transistors
transistor folding. See folding, of transistors

U

unplaced transistors
Components placed outside the cell boundary.

V

via
A connection point between wires of different types.

view
A specific representation of a cell, such as schematic, geometric, symbolic, logical, or routing. In the database, a view contains all cellviews of that view. Each view can have a viewType property that associates it with a specific application. For example, the view named "XYZ" could be a viewType "layout."

view name
A cellview property that defines the name for a cellview. A cellview has a default view name based on its view type, but you can give the cellview any name you want.

viewType
A property of a view that associates it with a particular application. The Cadence® design framework II software recognizes a set of registered viewTypes, such as the schematic view and the layout view.

Virtuoso® compactor
A Cadence® tool you can use to compact a layout. For more information about the compactor, see the Virtuoso Compactor Reference Manual.

W

weakly connected pins
An external connection between a pin or group of pins in a net to avoid specific internal connections (typically ones with high-resistance paths).

window
In the X environment, a rectangular area on a graphics workstation that emulates a terminal and runs an application separate from the applications in other windows. Usually you can have several windows on your screen at one time.

wire
A connection etched into the polysilicon, diffusion, or metal routing layers on an integrated circuit when it is fabricated.

X

.Xdefaults
An X Window System startup file that defines the X environment. Your system might have a default .Xdefaults file, or you might have your own .Xdefaults file in your home directory.

.xinitrc
An X file that defines the starting X environment. Your system might have a default .xinitrc file, or you might have your own .xinitrc file in your home directory.

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